Fairwind Assembler

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Fairwind Assembler byte-code is how NPC behavior and other game logic will be processed.

A working Assembler has already been put together: fasm_0.2-1_all.deb

FASM Directives

Include Files

#include "filename.inc"

This includes another source file.

Equates

symbolname	EQU	expression

This defines a symbol with a specific value. The expression must be fully resolvable at assemble-time, and may not include any forward references.

Labels

symbolname:

A label may be used to define a symbol whose value is the address for the next instruction.

VPU Architecture

Registers

Each VPU register is 8 bits wide (can hold unsigned numbers from 0 to 255), but when in "big" mode can be considered with the following register as a single 16 bit value. (For example, "big" R0 uses R0 for the low part and R1 for the high part.)

R0  CS - Code Selector (Low)
R1       Code Selector (High)
R2  CP - Code Pointer (Low)
R3       Code Pointer (High)
R4  AS - Access Selector (Low)
R5       Access Selector (High)
R6  AP - Access Pointer (Low)
R7       Access Pointer (High)
R8  RS - Return Selector (Low)
R9       Return Selector (High)
R10 RP - Return Pointer (Low)
R11      Return Pointer (High)
R12 DS - Data Selector (Low)
R13      Data Selector (High)
R14 SP - Stack Pointer (Low)
R15      Stack Pointer (High)
R16 - R255 = General Purpose Registers

Flags

ZF - Last calculation resulted in zero.
CF - Last calculation resulted in carry.
SF - Last calculation resulted in a negative number.
OF - Last calculation resulted in an overflow.
RF - This CS has read permission to this DS.
WF - This CS has write permission to this DS.

Selector Table

 SelectorID 16 bit
 ParentCS   16 bit
 Size       16 bit
 Type        8 bit (0=Code, 1=Data)
 Vectors     8 bit (for Code)      Unused      8 bit (for Data)
 APX        16 bit (for Code)      APR        16 bit (for Data)
 DefaultDS  16 bit (for Code)      APW        16 bit (for Data)

FASM Instruction Set

Modifier Instructions

big			-- Cause next instruction to operate on a 16 bit register value instead of 8.

Register Loading Instructions (8 or 16)

mov regDst, regSrc	-- Copy value of regSrc into regDst.
mov regDst, imm8	-- Copy imm8 into regDst.
xchg reg, reg		-- Exchange values of two registers.

Stack Manipulation Instructions

push imm8		-- Push imm8 onto the stack.
push reg		-- Push value of register onto stack.
push reg, imm8		-- Push value of multiple registers onto the stack from reg to reg+imm8.
pop reg			-- Pop value off of stack into register.
pop reg, imm8		-- Pop multiple values off of stack into reg+imm8 down to reg.

Arithmetic Instructions (8 or 16)

cmp regA, regB		-- Subtract register B from register A and discard result but keep flags.
cmp reg, imm8		-- Subtract imm8 from register and discard result but keep flags.
sub regDst, regSrc	-- Subtract regSrc from regDst.
sub regDst, imm8	-- Subtract imm8 from regDst.
dec regDst, imm8	-- Subtract imm8 from regDst (alias for sub.)
dec regDst		-- Subtract 1 from regDst.
sbb regDst, regSrc	-- Subtract regSrc from regDst with borrow using CF.
add regDst, regSrc	-- Add regSrc to regDst.
add regDst, imm8	-- Add imm8 to regDst.
inc regDst, imm8	-- Add imm8 to regDst (alias for add.)
inc regDst		-- Add 1 to regDst.
adc regDst, regSrc	-- Add with carry. Add regSrc and CF to regDst.
mul regDst, regSrc	-- Multiply regDst by regSrc. Unsigned.
mul regDst, imm8	-- Multiply regDst by imm8. Unsigned.
smul regDst, regSrc	-- Multiply regDst by regSrc. Signed.
smul regDst, imm8	-- Multiply regDst by imm8. Signed.
div regDst, regSrc	-- Divide regDst by regSrc. Unsigned.
div regDst, imm8	-- Divide regDst by imm8. Unsigned.
mod regDst, regSrc	-- Get remainder of regDst divided by regSrc. Unsigned.
mod regDst, imm8	-- Get remainder of regDst divided by imm8. Unsigned.
zdiv regDst, regSrc	-- Divide regDst by regSrc. Signed. Round towards zero.
zdiv regDst, imm8	-- Divide regDst by imm8. Signed. Round towards zero.
zmod regDst, regSrc	-- Get remainder according to zdiv.
zmod regDst, imm8	-- Get remainder according to zdiv.
fdiv regDst, regSrc	-- Floored division of regDst by regSrc. Signed.
fdiv regDst, imm8	-- Floored division of regDst by imm8. Signed.
fmod regDst, regSrc	-- Get remainder according to fdiv.
fmod regDst, imm8	-- Get remainder according to zdiv.
neg regDst		-- Negate: Get two's complement of regDst (change the sign.)

Bitwise Instructions (8 or 16)

not regDst		-- Invert all the bits in regDst.
shl regDst		-- Shift all bits in regDst left one position into CF. Rightmost becomes 0.
shl regDst, n		-- Shift all bits in regDst left n positions into CF. Rightmost becomes 0.
shr regDst		-- Shift all bits in regDst right one position into CF. Leftmost becomes 0.
shr regDst, n		-- Shift all bits in regDst right n positions into CF. Leftmost becomes 0.
rol regDst		-- Rotate all bits in regDst left one position into rightmost bit.
rol regDst, n		-- Rotate all bits in regDst left n positions into rightmost bit.
ror regDst		-- Rotate all bits in regDst right one position into leftmost bit.
ror regDst, n		-- Rotate all bits in regDst right n positions into leftmost bit.
rcl regDst		-- Rotate all bits in regDst left one position through CF into rightmost bit.
rcl regDst, n		-- Rotate all bits in regDst left n positions through CF into rightmost bit.
rcr regDst		-- Rotate all bits in regDst right one position through CF into leftmost bit.
rcr regDst, n		-- Rotate all bits in regDst right n positions through CF into leftmost bit.
and regDst, regSrc	-- Bitwise AND regDst by regSrc.
and regDst, imm8	-- Bitwise AND regDst by imm8.
or regDst, regSrc	-- Bitwise OR regDst by regSrc.
or regDst, imm8		-- Bitwise OR regDst by imm8.
xor regDst, regSrc	-- Bitwise XOR regDst by regSrc.
xor regDst, imm8	-- Bitwise XOR regDst by imm8.

Flow Control Instructions

call immCS, immVect	-- Call* immVect in immCS.
call regNewCS, regVect	-- Call* regVect in immCS.
call regNewCS, immVect	-- Call* regVect in regNewCS.
ncall imm16		-- Call* address imm16 in current CS.
ret			-- Return from call.
jmp reg16		-- Jump to reg16 in current CS.
jmp imm16		-- Jump to imm16 in current CS.
jz imm16		-- Jump to imm16 in current CS if ZF is true.
je imm16		-- Jump to imm16 in current CS if ZF is true.
jnz imm16		-- Jump to imm16 in current CS if ZF is false.
jne imm16		-- Jump to imm16 in current CS if ZF is false.
jc imm16		-- Jump to imm16 in current CS if CF is true.
jb imm16		-- Jump to imm16 in current CS if unsigned "below" (CF is true.)
jnc imm16		-- Jump to imm16 in current CS if CF is false.
jae imm16		-- Jump to imm16 in current CS if unsigned "above or equal" (CF is false.)
jbe imm16		-- Jump to imm16 in current CS if unsigned "below or equal."
ja imm16		-- Jump to imm16 in current CS if unsigned "above."
jl imm16		-- Jump to imm16 in current CS if signed "less than."
jge imm16		-- Jump to imm16 in current CS if signed "greater than or equal."
jle imm16		-- Jump to imm16 in current CS if signed "less than or equal."
jg imm16		-- Jump to imm16 in current CS if signed "greater than."
retns			-- Return from call if RS not zero.
retnl			-- Return from call if RS not CS.
retna			-- Return from call if AS not in APX list for CS.

Data Access Instructions

sto reg, reg16		-- Store value of reg in memory location DS:reg16.
sto reg, imm16		-- Store value of reg in memory location DS:imm16.
ksto reg, reg16		-- Store value of reg in hash key DS/reg16.
ksto reg, imm16		-- Store value of reg in hash key DS/imm16.
psto reg, reg16		-- Store value of reg in hash key CS/reg16.
psto reg, imm16		-- Store value of reg in hash key CS/imm16.
ssto reg, reg16		-- Store value of reg in hash key SYSTEM/reg16.
ssto reg, imm16		-- Store value of reg in hash key SYSTEM/imm16.
lod reg, reg16		-- Load value of reg from memory location DS:reg16.
lod reg, imm16		-- Load value of reg from memory location DS:imm16.
klod reg, reg16		-- Load value of reg from hash key DS/reg16.
klod reg, imm16		-- Load value of reg from hash key DS/imm16.
plod reg, reg16		-- Load value of reg from hash key CS/reg16.
plod reg, imm16		-- Load value of reg from hash key CS/imm16.
slod reg, reg16		-- Load value of reg from hash key SYSTEM/reg16.
slod reg, imm16		-- Load value of reg from hash key SYSTEM/imm16.

Access Control Instructions

vectors imm8		-- Specify the number of valid vectors for this Code Selector.
stab reg16		-- Specify the location within CS 0's primary DS of the Selector Table.
acsx reg16		-- Specify the location within DS of the Access Table for CS Execute Permission.
acsr reg16		-- Specify the location within CS primary DS of the Access Table for current DS Read Permission.
acsw reg16		-- Specify the location within CS primary DS of the Access Table for current DS Write Permission.

Miscellaneous Instructions

nop			-- No operation.
clc			-- Clear CF.
stc			-- Set CF.
cmc			-- Complement CF.